Low voltage, high current DC power requirements are generally accommodated by use of multiple power supplies connected in parallel to satisfy the total load current requirement. Originally, parallel supplies relied on droop in output voltage as a function of current to spread the load among the supplies. In such systems, the power supply with the highest gain would tend to operate at full current all the time, the supply with the next higher gain helping out when needed, and so forth. This results in one or two supplies running at maximum temperature and thereby aging more quickly. Furthermore, droop is at times intolerable.
To improve sharing of the load among parallel supplies, current mode regulation compares the output voltage error with a voltage indicative of current being supplied by a switching device to the load. A half-wave current mode regulator is illustrated in U.S. Pat. No. 5,122,726. However, this device is very inefficient and does not provide a quality DC voltage to the load. Additionally, the circuit of this patent bridges the voltage errors together through diodes, so that only the highest error is utilized to control all of the power supplies, thereby not regulating all but one of them in true current mode (not closed loop feedback in each of the other power supplies). In the '726 patent, a single error amplifier must drive the current mode pulse width modulator of all of the paralleled converters, which may easily exceed the capability of the circuits utilized.
An example of a load sharing, half-bridge (full wave) power converter is set forth in U.S. Pat. No. 5,164,890. This type of half-bridge is described in part with respect to FIG. 1. It is known to provide regulated voltage to a load 8 connected between a voltage bus 9 and ground 10, the bus 9 being connected to the output lines 11, 12 of a plurality of power supplies 13, 14 connected in parallel. One general form of power supply uses a half-bridge inverter in which a pair of metal-oxide-silicon field effect transistor (MOSFET) power switches 17, 18 are operated in alternating half cycles so as to provide current, first, from a positive side 19 of a voltage source, through switch 17, through a power transformer primary 20 and a capacitor 21 to a negative side 22 of the voltage source, and then from the positive side 19, through a capacitor 23, through the primary 20, in an opposite direction, and the switch 18 to the negative side 22. The power transformer associated with the primary winding 20 has a secondary winding 25 with a center tap to ground, each end of which is connected through a corresponding diode 26, 27 to a load filter capacitor 28 that is connected to the output 11. The switches are controlled in a voltage outer control loop by means of a commercially available pulse width modulated integrated circuit (PWM IC) 30, which typically may comprise the 3825 series, available from Unitrode and Silicon General, among others. In this type control, a voltage feedback signal is provided on a sense line 31 to an inverting input (-) of an error amplifier 32, the non-inverting input (+) of which is provided by a voltage reference 33 which defines the desired, regulated output voltage at the output 11. The output of the error amp 32 on a line 34 is provided to a negative input (-) of a compare circuit 35, the positive input (+) of which is connected to a line 36 which has-essentially a ramp voltage thereon. As is known, when the ramp voltage exceeds the error voltage on the line 34, the output of the compare circuit on a line 37 resets a bistable device 38 thereby cutting off the remaining portion of the output of an oscillator 39 at a gate 40. The output of the gate 40 triggers a toggle (flip-flop) 41 that determines which of two gates 42, 43 will be enabled, in an alternating fashion. The outputs of the gates 42 and 43 on corresponding lines 44, 45 operate the switches 17, 18 as described hereinbefore. All of the apparatus 31-43 is known, and is typically part of the PWM IC 30.
In the '890 patent, the average current supplied to the output power transformer of each of a plurality of parallel-connected power converters is compared to the average current of them all, and used to modify the output voltage feedback which is compared with the reference in the manner described hereinbefore. However, this circuit switches trapezoidal waves, thereby inherently switching the current on and off at nearly full voltage and full current, which results in inefficient switching losses in the inverter switches. Furthermore, by taking into account the differences in output current among the supplies, and modifying the local voltage feedback in each converter locally, the feedback does not accommodate the internal variances among the various converters, in the sense of true current mode regulation.
For greatest efficiency, full wave resonant conversion should be employed. However, current mode control in full wave converters is subject to charge imbalance during the switching half-cycles causing imbalance in the inverter capacitors' charge/discharge voltages, which eventually cause the capacitor bridge node to drift to the full supply voltage, thereby reducing the half bridge to operation in a half wave mode, which is intolerable. The imbalance can be caused by variations in the turn on/turn off characteristics of the MOSFET switches, slight variations in the internal impedance of the MOSFET switches, variations in the inverter resonant capacitor (21, 23) values, and so forth.